Timing analysis and verification of timed asynchronous circuits

Verification of asynchronous circuits using time Petri net unfolding

DAC '96 Proceedings of the 33rd annual Design Automation Conference

Bounded Delay Timing Analysis of a Class of CSP Programs

Formal Methods in System Design

Pipeline optimization for asynchronous circuits: complexity analysis and an efficient optimal algorithm

Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design

Relative timing

IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special section on system-level interconnect prediction (SLIP)

Relative Timing

ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems

Verification of Delayed-Reset Domino Circuits Using ATACS

ASYNC '99 Proceedings of the 5th International Symposium on Advanced Research in Asynchronous Circuits and Systems