The Ballast Methodology for Structured Partial Scan Design
IEEE Transactions on Computers
A Partial Scan Method for Sequential Circuits with Feedback
IEEE Transactions on Computers
Cost-free scan: a low-overhead scan path design methodology
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
On Synthesizing Circuits With Implicit Testability Constraints
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
A test synthesis approach to reducing BALLAST DFT overhead
DAC '97 Proceedings of the 34th annual Design Automation Conference
Proceedings of the conference on Design, automation and test in Europe
H-SCAN+: A Practical Low-Overhead RTL Design-for-Testability Technique for Industrial Designs
ITC '97 Proceedings of the 1997 IEEE International Test Conference
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