Cost-free scan: a low-overhead scan path design methodology
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
Test point insertion: scan paths through combinational logic
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Synthesizing Circuits with Implicit Testability Constraints
IEEE Design & Test
Addressing Early Design-For-Test Synthesis in a Production Environment
ITC '97 Proceedings of the 1997 IEEE International Test Conference
Synthesis-for-testability watermarking for field authenticatioil of VLSI intellectual property
IEEE Transactions on Circuits and Systems Part I: Regular Papers
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