An Optimal Multiplication Algorithm on Reconfigurable Mesh

  • Authors:
  • Ju-wook Jang;Heonchul Park;Viktor K. Prasanna

  • Affiliations:
  • Sogang Univ., Seoul, Korea;Samsung Electronics Co. Ltd., Seoul, Korea;Univ. of Southern California, Los Angeles

  • Venue:
  • IEEE Transactions on Parallel and Distributed Systems
  • Year:
  • 1997

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Abstract

An O(1) time algorithm to multiply two N-bit binary numbers using an N脳N bit-model of reconfigurable mesh is shown. It uses optimal mesh size and it improves previously known results for multiplication on the reconfigurable mesh. The result is obtained by using novel techniques for data representation and data movement and using multidimensional Rader Transform. The algorithm is extended to result in AT2 optimality over $1\le T\le \sqrt N$ in a variant of the bit-model of VLSI.