Area-time optimal VLSI integer multiplier with minimum computation time

Integer Division in Linear Time with Bounded Fan-In

IEEE Transactions on Computers

AT/sup 2/-Optimal Galois Field Multiplier for VLSI

IEEE Transactions on Computers

Extreme Area-Time Tradeoffs in VLSI

IEEE Transactions on Computers

A VLSI Modulo m Multiplier

IEEE Transactions on Computers

Space/Time Trade-Offs for Higher Radix Modular Multiplication Using Repeated Addition

IEEE Transactions on Computers

An Optimal Multiplication Algorithm on Reconfigurable Mesh

IEEE Transactions on Parallel and Distributed Systems

On the Lower Bound to the VLSI Complexity of Number Conversion from Weighted to Residue Representation

IEEE Transactions on Computers

Analysis and FPGA Implementation of Image Restoration under Resource Constraints

IEEE Transactions on Computers

Mesh Algorithms for Multiplication and Division

HiPC '01 Proceedings of the 8th International Conference on High Performance Computing

Montgomery's Multiplication Technique: How to Make It Smaller and Faster

CHES '99 Proceedings of the First International Workshop on Cryptographic Hardware and Embedded Systems

Collaborative and reconfigurable object tracking

The Journal of Supercomputing

Reconfiguration in network of embedded systems: Challenges and adaptive tracking case study

Journal of Embedded Computing - Real-Time and Embedded Computing Systems