Mesh-connected array processors with bypass capability for signal/image processing
Proceedings of the Twenty-First Annual Hawaii International Conference on Architecture Track
The connection machine
Connection autonomy in SIMD computers: a VLSI implementation
Journal of Parallel and Distributed Computing
Meshes with reconfigurable buses
Proceedings of the fifth MIT conference on Advanced research in VLSI
Array processor with multiple broadcasting
ISCA '85 Proceedings of the 12th annual international symposium on Computer architecture
Design and Analysis of a Generalized Architecture for Reconfigurable m-ary Tree Structures
IEEE Transactions on Computers
Parallel Computations on Reconfigurable Meshes
IEEE Transactions on Computers
Supporting sets of arbitrary connections on iWarp through communication context switches
SPAA '93 Proceedings of the fifth annual ACM symposium on Parallel algorithms and architectures
PIPADS—a low cost real-time visualization tool
Proceedings of the 1993 ACM/IEEE conference on Supercomputing
Performance analysis of a synchronous, circuit-switched interconnection cached network
ICS '94 Proceedings of the 8th international conference on Supercomputing
A Fast Algorithm for Computing a Histogram on Reconfigurable Mesh
IEEE Transactions on Pattern Analysis and Machine Intelligence
Reconfigurable Buses with Shift Switching: Concepts and Applications
IEEE Transactions on Parallel and Distributed Systems
Designing Efficient Parallel Algorithms on CRAP
IEEE Transactions on Parallel and Distributed Systems
The DMBC: architecture and fundamental operations
ICS '95 Proceedings of the 9th international conference on Supercomputing
All-to-All Personalized Communication in a Wormhole-Routed Torus
IEEE Transactions on Parallel and Distributed Systems
Parallel Computer Vision on a Reconfigurable Multiprocessor Network
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Constant Time Algorithms for Computational Geometry on the Reconfigurable Mesh
IEEE Transactions on Parallel and Distributed Systems
Time-Optimal Domain-Specific Querying on Enhanced Meshes
IEEE Transactions on Parallel and Distributed Systems
An Optimal Multiplication Algorithm on Reconfigurable Mesh
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Podality-Based Time-Optimal Computations on Enhanced Meshes
IEEE Transactions on Parallel and Distributed Systems
An Efficient Algorithm for Row Minima Computations on Basic Reconfigurable Meshes
IEEE Transactions on Parallel and Distributed Systems
Time- and VLSI-Optimal Sorting on Enhanced Meshes
IEEE Transactions on Parallel and Distributed Systems
Constant-Time Algorithms for Constrained Triangulations on Reconfigurable Meshes
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Using Emulations to Enhance the Performance of Parallel Architectures
IEEE Transactions on Parallel and Distributed Systems
An Efficient General In-Place Parallel Sorting Scheme
The Journal of Supercomputing
Scalable Hardware-Algorithms for Binary Prefix Sums
IEEE Transactions on Parallel and Distributed Systems
Optimal Algorithms for the Multiple Query Problem on Reconfigurable Meshes, with Applications
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
On the Parallel Computation of the Algebraic Path Problem
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Constant-Time Parallel Algorithms for Image Labeling on a Reconfigurable Network of Processors
IEEE Transactions on Parallel and Distributed Systems
IEEE Transactions on Parallel and Distributed Systems
Time-Optimal Visibility-Related Algorithms on Meshes with Multiple Broadcasting
IEEE Transactions on Parallel and Distributed Systems
Square Meshes Are Not Optimal for Convex Hull Computation
IEEE Transactions on Parallel and Distributed Systems
Optimal Segmented Scan and Simulation of Reconfigurable Architectures on Fixed Connection Networks
HiPC '00 Proceedings of the 7th International Conference on High Performance Computing
Some Image Processing Algorithms on a RAP with Wider Bus Networks
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
2D Object Recognition on a Reconfigurable Mesh
IPPS '96 Proceedings of the 10th International Parallel Processing Symposium
On the Dynamic Initialization of Parallel Computers
IPPS '97 Proceedings of the 11th International Symposium on Parallel Processing
Efficient List Ranking Algorithms on Reconfigurable Mesh
COCOON '00 Proceedings of the 6th Annual International Conference on Computing and Combinatorics
A Scalable VLSI Architecture for Binary Prefix Sums
IPPS '98 Proceedings of the 12th. International Parallel Processing Symposium on International Parallel Processing Symposium
Time and work optimal simulation of basic reconfigurable meshes on hypercubes
Journal of Parallel and Distributed Computing
Journal of Intelligent and Robotic Systems
A Comparative Performance Study of an Interconnection Cached Network
ICPP '94 Proceedings of the 1994 International Conference on Parallel Processing - Volume 01
Scheduling independent jobs for torus connected networks with/without link contention
Mathematical and Computer Modelling: An International Journal
| Hi-index | 14.99 |
An interconnection network is presented for a massively parallel fine-grained single-instruction, multiple-data (SIMD) system, called the polymorphic-torus, whose design goal is to provide high communication bandwidth under a packaging constraint. This goal is achieved by the polymorphic principle, which injects switches with circuit-switching capability into every node of a base network (e.g. a two-dimensional torus). The polymorphic approach maintains wiring complexity of the base network but effectively increases the communication bandwidth due to its flexibility in reconfiguring the switches individually and dynamically to match the algorithm graph. Formal analysis on interpackage wiring (the flux) and the intrapackage wiring (the fluid) is given for the polymorphic-torus and the related torus networks. Three algorithms, namely, the Boolean, the max/min, and the sum operations, are developed to illustrate the use of the polymorphic principle in enhancing the communication bandwidth with no penalty of the interpackage wiring complexity.