RC interconnect optimization under the Elmore delay model
DAC '94 Proceedings of the 31st annual Design Automation Conference
Optimal wiresizing for interconnects with multiple sources
ICCAD '95 Proceedings of the 1995 IEEE/ACM international conference on Computer-aided design
DAC '96 Proceedings of the 33rd annual Design Automation Conference
On Finding the Maxima of a Set of Vectors
Journal of the ACM (JACM)
Delay optimization algorithms for tree models of mos circuits
Delay optimization algorithms for tree models of mos circuits
Performance driven bus buffer insertion
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Optimal wiresizing under Elmore delay model
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
LIBRA—a library-independent framework for post-layout performance optimization
ISPD '98 Proceedings of the 1998 international symposium on Physical design
A practical repeater insertion method in high speed VLSI circuits
DAC '98 Proceedings of the 35th annual Design Automation Conference
ICCD '00 Proceedings of the 2000 IEEE International Conference on Computer Design: VLSI in Computers & Processors
Hi-index | 0.00 |
This paper presents new results in the area of timingoptimization for multi-source nets. The Augmented RC-Diameter (ARD) is proposed as a natural and practical performance metric and a linear time algorithm for computingthe ARD of a multi-source net is presented. Building onthe ARD, an algorithm for optimal repeater insertion is presented: for a given multi-source topology the algorithm efficiently identifies an optimal assignment of repeaters to prescribed insertion points under the "min cost timing feasible"problem formulation. The algorithm has been implementedand preliminary experimental results are promising.