Interface timing verification drives system design

Authors:
Ajay J. Daga;Peter R. Suaris
Affiliations:
Interconnectix, a Mentor Graphics Business, 10220 S.W. Nimbus Avenue, Bldg. K4, Portland, OR;Interconnectix, a Mentor Graphics Business, 10220 S.W. Nimbus Avenue, Bldg. K4, Portland, OR
Venue:
DAC '97 Proceedings of the 34th annual Design Automation Conference
Year:
1997

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Abstract

System design, i.e. the design of board-level circuits andsystems-on-a-chip, focuses on the integration of off-the-shelf andapplication-specific VLSI components. A key aspect of systemdesign is to ensure the satisfaction of component interface timingrequirements. This is necessary for the correct exchange ofinformation among components on a system. We present amethodology for the interface timing verification and subsequenttiming-driven floorplanning of systems. We present results on theapplication of this methodology to real-world circuits.