High-level power modeling, estimation, and optimization
DAC '97 Proceedings of the 34th annual Design Automation Conference
Maximum power estimation using the limiting distributions of extreme order statistics
DAC '98 Proceedings of the 35th annual Design Automation Conference
An optimization-based error calculation for statistical power estimation of CMOS logic circuits
DAC '98 Proceedings of the 35th annual Design Automation Conference
On mixture density and maximum likelihood power estimation via expectation-maximization
ASP-DAC '00 Proceedings of the 2000 Asia and South Pacific Design Automation Conference
Least-square estimation of average power in digital CMOS circuits
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Precise identification of the worst-case voltage drop conditions in power grid verification
Proceedings of the 2006 IEEE/ACM international conference on Computer-aided design
Full-chip leakage current estimation based on statistical sampling techniques
Proceedings of the 18th ACM Great Lakes symposium on VLSI
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This paper proposes to use quantile points of the cumulative distributionfunction for power consumption to provide detailed informationabout the power distribution in a circuit. The paper also presentstwo techniques based on population pruning and stratification to improvethe efficiency of estimation. Both population pruning and stratificationare based on a lowcost predictor, such as zero-delay powerestimate. Experimental results show the effectiveness of the proposedtechniques in providing detailed power distribution information.