Combinational logic optimization techniques in sequential logic synthesis
Combinational logic optimization techniques in sequential logic synthesis
The validity of retiming sequential circuits
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Metamorphosis: state assignment by retiming and re-encoding
Proceedings of the 1996 IEEE/ACM international conference on Computer-aided design
On the optimization power of redundancy addition and removal techniques for sequential circuits
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Synthesis and verification
Retiming with Interconnect and Gate Delay
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Operation chaining asynchronous pipelined circuits
Proceedings of the 2007 IEEE/ACM international conference on Computer-aided design
Combining retiming and sequential redundancy addition and removal for sequential logic optimization
ICC'06 Proceedings of the 10th WSEAS international conference on Circuits
On some transformation invariants under retiming and resynthesis
TACAS'05 Proceedings of the 11th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Fast and effective placement and routing directed high-level synthesis for FPGAs
Proceedings of the 2014 ACM/SIGDA international symposium on Field-programmable gate arrays
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