Scheduling synchronous dataflow graphs for efficient looping
Journal of VLSI Signal Processing Systems
Joint Minimization of Code and Data for Synchronous DataflowPrograms
Formal Methods in System Design
Implementing DSP applications on heterogeneous targets using minimal size data buffers
RSP '96 Proceedings of the 7th IEEE International Workshop on Rapid System Prototyping (RSP '96)
Shared memory implementations of synchronous dataflow specifications
DATE '00 Proceedings of the conference on Design, automation and test in Europe
A Buffer Merging Technique for Reducing Memory Requirements of Synchronous Dataflow Specifications
Proceedings of the 12th international symposium on System synthesis
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Minimising buffer requirements of synchronous dataflow graphs with model checking
Proceedings of the 42nd annual Design Automation Conference
Memory-optimized software synthesis from dataflow program graphs with large size data samples
EURASIP Journal on Applied Signal Processing
Buffer Optimization and Dispatching Scheme for Embedded Systems with Behavioral Transparency
ACM Transactions on Design Automation of Electronic Systems (TODAES)
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