A Queueing Model with Finite Waiting Room and Blocking
Journal of the ACM (JACM)
On the effectiveness of set associative page mapping and its application to main memory management
ICSE '76 Proceedings of the 2nd international conference on Software engineering
Performance of the GE-645 associative memory while Multics is in operation
Proceedings of the SIGOPS workshop on System performance evaluation
An instruction timing model of CPU performance
ISCA '77 Proceedings of the 4th annual symposium on Computer architecture
The A0 inversion model of program paging behavior
The A0 inversion model of program paging behavior
A class of compatible cache consistency protocols and their support by the IEEE futurebus
ISCA '86 Proceedings of the 13th annual international symposium on Computer architecture
Efficient (stack) algorithms for analysis of write-back and sector memories
ACM Transactions on Computer Systems (TOCS)
An effective write policy for software coherence schemes
Proceedings of the 1992 ACM/IEEE conference on Supercomputing
Cache write policies and performance
ISCA '93 Proceedings of the 20th annual international symposium on computer architecture
The effectiveness of caches for vector processors
ICS '94 Proceedings of the 8th international conference on Supercomputing
Cache designs with partial address matching
MICRO 27 Proceedings of the 27th annual international symposium on Microarchitecture
CPU Cache Prefetching: Timing Evaluation of Hardware Implementations
IEEE Transactions on Computers
The performance impact of block sizes and fetch strategies
ISCA '90 Proceedings of the 17th annual international symposium on Computer Architecture
ACM Computing Surveys (CSUR)
Stack processing techniques in delayed-staging storage hierarchies
Communications of the ACM
CASES '02 Proceedings of the 2002 international conference on Compilers, architecture, and synthesis for embedded systems
Performance of shared cache for parallel-pipelined computer systems
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
Analysis of multiprocessor cache organizations with alternative main memory update policies
ISCA '81 Proceedings of the 8th annual symposium on Computer Architecture
Effectiveness of Private Caches in Multiprocessor Systems with Parallel-Pipelined Memories
IEEE Transactions on Computers
Shared Cache for Multiple-Stream Computer Systems
IEEE Transactions on Computers
Improving SDRAM access energy efficiency for low-power embedded systems
ACM Transactions on Embedded Computing Systems (TECS)
Partial address directory for cache access
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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