Highly concurrent scalar processing
Highly concurrent scalar processing
Polycyclic Vector scheduling vs. Chaining on 1-Port Vector supercomputers
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
Squeezing more CPU performance out of a Cray-2 by Vector block scheduling
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
Computer architecture: a quantitative approach
Computer architecture: a quantitative approach
Compile time optimization of memory and register usage on the Cray 2
Selected papers of the second workshop on Languages and compilers for parallel computing
ISCA '82 Proceedings of the 9th annual symposium on Computer Architecture
Improving the throughput of a pipeline by insertion of delays
ISCA '76 Proceedings of the 3rd annual symposium on Computer architecture
A systolic array optimizing compiler
A systolic array optimizing compiler
Register requirements of pipelined processors
ICS '92 Proceedings of the 6th international conference on Supercomputing
A Simulation Study of Decoupled Vector Architectures
The Journal of Supercomputing
Decoupled vector architectures
HPCA '96 Proceedings of the 2nd IEEE Symposium on High-Performance Computer Architecture
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