Analog test design with IDD measurements for the detection of parametric and catastrophic faults
Proceedings of the conference on Design, automation and test in Europe
An Off-chip IDDQ Current Measurement Unit for Telecommunication ASICs
Proceedings of the IEEE International Test Conference on TEST: The Next 25 Years
Towards an Effective IDDQ Test Vector Selection and Application Methodology
Proceedings of the IEEE International Test Conference on Test and Design Validity
Off Chip Monitors and Built In Current Sensors for Analogue and Mixed Signal Testing
IDDQ '98 Proceedings of the IEEE International Workshop on IDDQ Testing
Theoretical and practical aspects of Iddq Settling: impact on measurement timing and quality
Proceedings of the conference on Design, automation and test in Europe
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This paper describes work in progress towards thedevelopment, evaluation and validation of a structural, costeffective and quantifiable analog and mixed-signal test methodology,applicable in a production test environment and based on theapplication of supply current testing. To enable and support themeasurements at first an analog supply current monitor was realised.The monitor offers a measurement range of 50 mA, a bandwidth of 1.5MHz and a resolution better than 1 μA. Subsequently the monitorwas used to carry out measurements on a mixed-signal AsynchronousDigital Subscriber Line (ADSL) ASIC, to evaluate the feasibility ofthe methodology. As these initial measurements provided veryinteresting results, the experiments towards the validation andquantification of the test methodology are now being repeated on alarger scale. The results gathered so far show the potential of theapproach to enhance test quality combined with test cost reduction.