The independence of miss ratio on page size
Journal of the ACM (JACM)
Dynamic space-sharing in computer systems
Communications of the ACM
Operating Systems Theory
A study of program locality and lifetime functions
SOSP '75 Proceedings of the fifth ACM symposium on Operating systems principles
Benchmark Synthesis Using the LRU Cache Hit Function
IEEE Transactions on Computers
Cache performance of operating system and multiprogramming workloads
ACM Transactions on Computer Systems (TOCS)
ACM Transactions on Computer Systems (TOCS)
The Stack Growth Function: Cache Line Reference Models
IEEE Transactions on Computers
IEEE Transactions on Computers
Evaluating Associativity in CPU Caches
IEEE Transactions on Computers
A model for estimating trace-sample miss ratios
SIGMETRICS '91 Proceedings of the 1991 ACM SIGMETRICS conference on Measurement and modeling of computer systems
A Model of Workloads and its Use in Miss-Rate Prediction for Fully Associative Caches
IEEE Transactions on Computers
ACM SIGMETRICS Performance Evaluation Review
An inter-reference gap model for temporal locality in program behavior
Proceedings of the 1995 ACM SIGMETRICS joint international conference on Measurement and modeling of computer systems
Using cache memory to reduce processor-memory traffic
25 years of the international symposia on Computer architecture (selected papers)
Transient behavior of cache memories
ACM Transactions on Computer Systems (TOCS)
A study of superfluity in storage hierarchies
Communications of the ACM
Modeling Live and Dead Lines in Cache Memory Systems
IEEE Transactions on Computers
A Comparison of Trace-Sampling Techniques for Multi-Megabyte Caches
IEEE Transactions on Computers
A Trace-Driven Simulator for Performance Evaluation of Cache-Based Multiprocessor Systems
IEEE Transactions on Parallel and Distributed Systems
Using cache memory to reduce processor-memory traffic
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
The use of static column ram as a memory hierarchy
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
Cache hit ratios with geometric task switch intervals
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
From the fractal dimension of the intermiss gaps to the cache-miss ratio
IBM Journal of Research and Development - Q-Coder adaptive binary arithmetic coder
Statistical sampling of microarchitecture simulation
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Computation of Cold-Start Miss Ratios
IEEE Transactions on Computers
Reducing cache misses through programmable decoders
ACM Transactions on Architecture and Code Optimization (TACO)
A survey analysis of memory elasticity techniques
Euro-Par 2010 Proceedings of the 2010 conference on Parallel processing
| Hi-index | 48.26 |
In a two-level computer storage hierarchy, miss ratio measurements are often made from a “cold start”, that is, made with the first-level store initially empty. For large capacities the effect on the measured miss ratio of the misses incurred while filling the first-level store can be significant, even for long reference strings. Use of “warm-start” rather than “cold-start” miss ratios cast doubt on the widespread belief that the observed “S-shape” of lifetime (reciprocal of miss ratio) versus capacity curve indicates a property of behavior of programs that maintain a constant number of pages in main storage. On the other hand, if cold-start miss ratios are measured as a function of capacity and measurement length, then they are useful in studying systems in which operation of a program is periodically interrupted by task switches. It is shown how to obtain, under simple assumptions, the cache miss ratio for multiprogramming from cold-start miss ratio values and how to obtain approximate cold-start miss ratios from warm-start miss ratios.