Cache hit ratios with geometric task switch intervals

  • Authors:
  • Ilkka J. Haikala

  • Affiliations:
  • University of Helsinki, Department of Computer Science, Tukholmankatu 2, SF-00250 Helsinki 25, Finland

  • Venue:
  • ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
  • Year:
  • 1984

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Abstract

A simple Markov chain model is used to estimate the effect of the cache flushes. The model assumes LRU stack model of program behaviour and geometrically distributed lengths of task switch intervals. Given the LRU stack depth distribution, one may easily compute estimates of miss ratios for caches of all sizes with any desired average task switch interval. The model is validated with three reference strings recorded from simulations of large B7800 Extended Algol programs. The estimates obtained with the Markov model are within 12% error margin from the results obtained by cache simulation.