Design and analysis of dynamic Huffman codes
Journal of the ACM (JACM)
Data compression: methods and theory
Data compression: methods and theory
Data compression with finite windows
Communications of the ACM
Text compression
Practical dictionary management for hardware data compression
Communications of the ACM
Data and image compression (4th ed.): tools and techniques
Data and image compression (4th ed.): tools and techniques
Digital Image Processing
DCC '95 Proceedings of the Conference on Data Compression
A Mathematical Theory of Communication
A Mathematical Theory of Communication
Efficient VLSI for Lempel-Ziv compression in wireless data communication networks
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A lossless data compression and decompression algorithm and its hardware architecture
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
A new architecture of a two-stage lossless data compression and decompression algorithm
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Cache aware compression for processor debug support
Proceedings of the Conference on Design, Automation and Test in Europe
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In this paper, a parallel dictionary based LZW algorithm called PDLZW algorithm and its hardware architecture for compression and decompression processors are proposed. In this architecture, instead of using a unique fixed-word-width dictionary a hierarchical variable-word-width dictionary set containing several dictionaries of small address space and increasing word widths is used for both compression and decompression algorithms. The results show that the new architecture not only can be easily implemented in VLSI technology because of its high regularity but also has faster compression and decompression rate since it no longer needs to search the dictionary recursively as the conventional implementations do.