Correctness of Pipelined Machines
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Automatic Verification of Safety and Liveness for XScale-Like Processor Models Using WEB Refinements
Proceedings of the conference on Design, automation and test in Europe - Volume 1
Using positive equality to prove liveness for pipelined microprocessors
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
Refinement Maps for Efficient Verification of Processor Models
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
A complete compositional reasoning framework for the efficient verification of pipelined machines
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Monolithic verification of deep pipelines with collapsed flushing
Proceedings of the conference on Design, automation and test in Europe: Proceedings
Refinement for Pipelining in Event-B
Electronic Notes in Theoretical Computer Science (ENTCS)
A refinement-based compositional reasoning framework for pipelined machine verification
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Automatic formal verification of liveness for pipelined processors with multicycle functional units
CHARME'05 Proceedings of the 13 IFIP WG 10.5 international conference on Correct Hardware Design and Verification Methods
Refinement and theorem proving
SFM'06 Proceedings of the 6th international conference on Formal Methods for the Design of Computer, Communication, and Software Systems
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