SIGMETRICS '87 Proceedings of the 1987 ACM SIGMETRICS conference on Measurement and modeling of computer systems
Memory bandwidth limitations of future microprocessors
ISCA '96 Proceedings of the 23rd annual international symposium on Computer architecture
ISPD '98 Proceedings of the 1998 international symposium on Physical design
DAC '98 Proceedings of the 35th annual Design Automation Conference
VLSI design in the 3rd dimension
Integration, the VLSI Journal
A novel VLSI layout fabric for deep sub-micron applications
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Multiple Si layer ICs: motivation, performance analysis, and design implications
Proceedings of the 37th Annual Design Automation Conference
Simultaneous Analytic Area and Power Optimization for Repeater Insertion
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
POMR: a power-aware interconnect optimization methodology
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
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A simple approach to global wire delays leads to the conclusion that within a few years interconnect is going to demand an overwhelming portion of the chip estate. In addition, memory-to-compute ratio for area is growing very fast. These observations are added to the already considerable set of arguments for breaking radically with traditional silicon design paradigms.