Bus-invert coding for low-power I/O
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Exploiting the locality of memory references to reduce the address bus energy
ISLPED '97 Proceedings of the 1997 international symposium on Low power electronics and design
Synthesis of low-overhead interfaces for power-efficient communication over wide buses
Proceedings of the 36th annual ACM/IEEE Design Automation Conference
Frequent value locality and value-centric data cache design
ASPLOS IX Proceedings of the ninth international conference on Architectural support for programming languages and operating systems
Energy efficient frequent value data cache design
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Power protocol: reducing power dissipation on off-chip data buses
Proceedings of the 35th annual ACM/IEEE international symposium on Microarchitecture
Power efficient encoding techniques for off-chip data buses
Proceedings of the 2003 international conference on Compilers, architecture and synthesis for embedded systems
Software-Controlled Operand-Gating
Proceedings of the international symposium on Code generation and optimization: feedback-directed and runtime optimization
A tunable bus encoder for off-chip data buses
ISLPED '05 Proceedings of the 2005 international symposium on Low power electronics and design
VALVE: Variable Length Value Encoder for Off-Chip Data Buses.
ICCD '05 Proceedings of the 2005 International Conference on Computer Design
Optimizing bus energy consumption of on-chip multiprocessors using frequent values
Journal of Systems Architecture: the EUROMICRO Journal - Special issue: Parallel, distributed and network-based processing
Hierarchical value cache encoding for off-chip data bus
Proceedings of the 2006 international symposium on Low power electronics and design
On-Chip Communication Architectures: System on Chip Interconnect
On-Chip Communication Architectures: System on Chip Interconnect
Energy-efficient encoding techniques for off-chip data buses
ACM Transactions on Embedded Computing Systems (TECS)
Frequent value compression in packet-based NoC architectures
Proceedings of the 2009 Asia and South Pacific Design Automation Conference
Self-calibrated energy-efficient and reliable channels for on-chip interconnection networks
Journal of Electrical and Computer Engineering - Special issue on Networks-on-Chip: Architectures, Design Methodologies, and Case Studies
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