Low-power operation using self-timed circuits and adaptive scaling of the supply voltage
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low-power design
Embedded power supply for low-power DSP
IEEE Transactions on Very Large Scale Integration (VLSI) Systems - Special issue on low power electronics and design
Voltage scheduling problem for dynamically variable voltage processors
ISLPED '98 Proceedings of the 1998 international symposium on Low power electronics and design
A rate selection algorithm for quantized undithered dynamic supply voltage scaling (poster session)
ISLPED '00 Proceedings of the 2000 international symposium on Low power electronics and design
A realistic variable voltage scheduling model for real-time applications
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Optimal voltage allocation techniques for dynamically variable voltage processors
Proceedings of the 40th annual Design Automation Conference
Dynamic voltage scheduling with buffers in low-power multimedia applications
ACM Transactions on Embedded Computing Systems (TECS)
Optimal voltage allocation techniques for dynamically variable voltage processors
ACM Transactions on Embedded Computing Systems (TECS)
DC-DC converter-aware power management for battery-operated embedded systems
Proceedings of the 42nd annual Design Automation Conference
Proceedings of the 20th annual conference on Integrated circuits and systems design
Hard real-time tasks' scheduling considering voltage scaling, precedence and exclusion relations
Information Processing Letters
Distributed DVFS using rationally-related frequencies and discrete voltage levels
Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design
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This paper presents a highly energy efficient alternative algorithm to the conventional workload averaging technique for voltage quantized dynamic voltage scaling. This algorithm incorporates the strengths of the conventional workload averaging technique and our previously proposed Rate Selection Algorithm, resulting in higher energy savings while minimizing the buffer size requirement and improving the overall system stability by minimizing the number of voltage transitions. Our experimental work using the Forward Mapped Inverse Discrete Cosine Transform computation (FMIDCT) as the variable workload computation, nine 300-frame MPEG-2 video sequences as the test data, and a 4-level voltage quantization shows that our algorithm produces better energy savings in all test cases when compared to the workload averaging technique, and the maximum energy saving for the test cases was 23%.