Bit serial multiplication in finite fields
SIAM Journal on Discrete Mathematics
Designs, Codes and Cryptography
Efficient Exponentiation of a Primitive Root in GF(2m)
IEEE Transactions on Computers
New Low-Complexity Bit-Parallel Finite Field Multipliers Using Weakly Dual Bases
IEEE Transactions on Computers
Architectures for Exponentiation Over GD(2/sup n/) Adopted for Smartcard Application
IEEE Transactions on Computers
GF(2m) Multiplication and Division Over the Dual Basis
IEEE Transactions on Computers
A new characterization of dual bases in finite fields and its applications
Discrete Applied Mathematics
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A new architecture for finite field exponentiation using weakly dual bases is presented. An extended bidirectional linear feedback shift register is designed to multiply an arbitrary field element with certain essential multiplicands in weakly dual basis (WDB). Each of these multiplications is done in one single clock cycle. It is shown that a bit parallel implementation of the WDB fourth power has complexities comparable to those of polynomial basis fourth power. The proposed structure can effectively speed up the computation of exponentiation and is expected to reduce the power consumption compared to the conventional square and multiply scheme. Compared to the structure for polynomial basis exponentiation, the new structure is thus advantageous in a system where the WDB is already available.