HSpeedEx: a high-speed extractor for substrate noise analysis in complex mixed signal SOC

  • Authors:
  • Adil Koukab;Catherine Dehollain;Michel Declercq

  • Affiliations:
  • Swiss Federal Institute of Technology (EPFL), Electronics Laboratory CH-1015 Lausanne, Switzerland;Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland;Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland

  • Venue:
  • Proceedings of the 39th annual Design Automation Conference
  • Year:
  • 2002

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Abstract

The unprecedented impact of noise coupling on Mixed-Signal Systems-On-a-Chip (MS-SOC) functionality, brings a new set of challenges for Electronics Design Automation (EDA) tool developers. In this paper, we propose a new approach which combines a thorough physical comprehension of the noise coupling effects with an improved Boundary-Element-Method (BEM) to accelerate the substrate model extraction and to avoid the dense matrix storage. The low computational efforts required, as well as speed and accuracy reached, makes this method a highly promising alternative to verify complex MS-SOCs.