Symbolic analysis for parallelizing compilers
ACM Transactions on Programming Languages and Systems (TOPLAS)
ACM Computing Surveys (CSUR)
Data-localization for Fortran macro-dataflow computation using partial static task assignment
ICS '96 Proceedings of the 10th international conference on Supercomputing
Address calculation for retargetable compilation and exploration of instruction-set architectures
DAC '96 Proceedings of the 33rd annual Design Automation Conference
The Static Parallelization of Loops and Recursions
The Journal of Supercomputing - Special issue: high performance computing systems
International Journal of Parallel Programming
Journal of VLSI Signal Processing Systems
A global communication optimization technique based on data-flow analysis and linear algebra
ACM Transactions on Programming Languages and Systems (TOPLAS)
Finding Quadratic Schedules for Affine Recurrence Equations Via Nonsmooth Optimization
Journal of VLSI Signal Processing Systems
A framework for performance-based program partitioning
Progress in computer research
Compiler-Directed Collective-I/O
IEEE Transactions on Parallel and Distributed Systems
An energy saving strategy based on adaptive loop parallelization
Proceedings of the 39th annual Design Automation Conference
A framework for performance-based program partitioning
Progress in computer research
Principles of Speculative Run-Time Parallelization
LCPC '98 Proceedings of the 11th International Workshop on Languages and Compilers for Parallel Computing
Automatic Analysis of Loops to Exploit Operator Parallelism on Reconfigurable Systems
LCPC '98 Proceedings of the 11th International Workshop on Languages and Compilers for Parallel Computing
Automatic Coarse Grain Task Parallel Processing on SMP Using OpenMP
LCPC '00 Proceedings of the 13th International Workshop on Languages and Compilers for Parallel Computing-Revised Papers
ISHPC '00 Proceedings of the Third International Symposium on High Performance Computing
An Approach to Mixed Systems Co-Synthesis
CODES '97 Proceedings of the 5th International Workshop on Hardware/Software Co-Design
Compiler-assisted generation of error-detecting parallel programs
FTCS '96 Proceedings of the The Twenty-Sixth Annual International Symposium on Fault-Tolerant Computing (FTCS '96)
On the parallelization of loop nests containing while loops
PAS '95 Proceedings of the First Aizu International Symposium on Parallel Algorithms/Architecture Synthesis
Partitioning Loops with Variable Dependence Distances
ICPP '00 Proceedings of the Proceedings of the 2000 International Conference on Parallel Processing
Dynamic on-chip memory management for chip multiprocessors
Proceedings of the 2004 international conference on Compilers, architecture, and synthesis for embedded systems
Exploitation of parallelism to nested loops with dependence cycles
Journal of Systems Architecture: the EUROMICRO Journal
Optimizing Array-Intensive Applications for On-Chip Multiprocessors
IEEE Transactions on Parallel and Distributed Systems
Chip multi-processor scalability for single-threaded applications
ACM SIGARCH Computer Architecture News - Special issue: dasCMP'05
Customized on-chip memories for embedded chip multiprocessors
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Hybrid multi-core architecture for boosting single-threaded performance
ACM SIGARCH Computer Architecture News
Parallel Computing Algorithms and Applications
Computing in Science and Engineering
Transformations techniques for extracting parallelism in non-uniform nested loops
WSEAS Transactions on Computers
Affine and unimodular transformations for non-uniform nested loops
ICCOMP'08 Proceedings of the 12th WSEAS international conference on Computers
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Modern development methods and tools for embedded reconfigurable systems: A survey
Integration, the VLSI Journal
Automatic program parallelization for multicore processors
PPAM'09 Proceedings of the 8th international conference on Parallel processing and applied mathematics: Part I
Proceedings of the International Conference on Computer-Aided Design
Fast and generalized polynomial time memory consistency verification
CAV'06 Proceedings of the 18th international conference on Computer Aided Verification
A geometric approach for partitioning n-dimensional non-rectangular iteration spaces
LCPC'04 Proceedings of the 17th international conference on Languages and Compilers for High Performance Computing
A study of performance scalability by parallelizing loop iterations on multi-core SMPs
ICA3PP'10 Proceedings of the 10th international conference on Algorithms and Architectures for Parallel Processing - Volume Part I
Hierarchical parallelism control for multigrain parallel processing
LCPC'02 Proceedings of the 15th international conference on Languages and Compilers for Parallel Computing
Automated Mapping of the MapReduce Pattern onto Parallel Computing Platforms
Journal of Signal Processing Systems
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From the Publisher:Automatic Transformation of sequential program into a parallel form is a subject that presents a great intellectual challenge and promises a large practical reward. There is a tremendous investment in existing sequential programs, and scientists and engineers continue to write their application programs in sequential languages (primarily in Fortran). The demand for higher and higher speedups keeps going up. The job of a restructuring compiler is to discover the dependence structure of a given program and transform the program in a way that is consistent with both that dependence structure and the characteristics of the given machine. Much attention in this field of research has been focused on the Fortran do loop. This is where one expects to find major chunks of computation that need to be performed repeatedly for different values of the index variable. Many loop transformations have been designed over the years, and several of them can be found in any parallelizing compiler currently in use in industry or at a university research facility. The aim of the Loop Transformations for Restructuring Compilers series of books is to provide a rigorous theory of loop transformations and dependence analysis. We want to develop the transformations in a consistent mathematical framework using objects like directed graphs, matrices, and linear equations. Then, the algorithms that implement the transformations can be precisely described in terms of certain abstract mathematical algorithms. The first volume, Loop Transformations for Restructuring Compilers: The Foundations, provided the general mathematical background needed for loop transformations (including those basic mathematical algorithms), discussed data dependence, and introduced the major transformations. The current volume, Loop Parallelization, builds a detailed theory of iteration-level loop transformations based on the material developed in the previous book. We present a theory of loop transformations that is