Activity-sensitive architectural power analysis for the control path
ISLPED '95 Proceedings of the 1995 international symposium on Low power design
From VHDL to efficient and first-time-right designs: a formal approach
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Architectural Synthesis of Digital Signal ProcessingAlgorithms Using “IRIS”
Journal of VLSI Signal Processing Systems - Special issue on the 1995 VLSI signal processing workshop
Clock Skew Optimization for Peak Current Reduction
Journal of VLSI Signal Processing Systems - Special issue on high performance clock distribution networks
Instruction set mapping for performance optimization
ICCAD '93 Proceedings of the 1993 IEEE/ACM international conference on Computer-aided design
Methodology for behavioral synthesis-based algorithm-level design space exploration: DCT case study
DAC '97 Proceedings of the 34th annual Design Automation Conference
HYPER-LP: a system for power minimization using architectural transformations
ICCAD '92 Proceedings of the 1992 IEEE/ACM international conference on Computer-aided design
Journal of VLSI Signal Processing Systems - Special issue on spatiotemporal signal processing with analog CNN visual microprocessors
Specification and Design of Embedded Hardware-Software Systems
IEEE Design & Test
Net Clustering Based Constructive and Iterative Improvement Approaches for Macro-Cell Placement
Journal of VLSI Signal Processing Systems
VLSI Implementation of new arithmetic residue to binary decoders
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Using rapid prototyping in computer architecture design laboratories
WCAE-2 '96 Proceedings of the 1996 workshop on Computer architecture education
| Hi-index | 0.00 |