Clustered VLIW architecture with predicated switching
Proceedings of the 38th annual Design Automation Conference
Scheduling coarse-grain operations for VLIW processors
ISSS '00 Proceedings of the 13th international symposium on System synthesis
Automatic Architectural Synthesis of VLIW and EPIC Processors
Proceedings of the 12th international symposium on System synthesis
Automatic Topology-Based Identification of Instruction-Set Extensions for Embedded Processors
Proceedings of the conference on Design, automation and test in Europe
An Introduction to the Kalman Filter
An Introduction to the Kalman Filter
Modeling methodology for integrated simulation of embedded systems
ACM Transactions on Modeling and Computer Simulation (TOMACS)
Interactive presentation: Time-constrained clustering for DSE of clustered VLIW-ASP
Proceedings of the conference on Design, automation and test in Europe
CODES+ISSS '07 Proceedings of the 5th IEEE/ACM international conference on Hardware/software codesign and system synthesis
Reducing complexity of multiobjective design space exploration in VLIW-based embedded systems
ACM Transactions on Architecture and Code Optimization (TACO)
Instruction set extension exploration in multiple-issue architecture
Proceedings of the conference on Design, automation and test in Europe
Energy-performance Exploration of a CGA-based SDR Processor
Journal of Signal Processing Systems
AHDAM: an asymmetric homogeneous with dynamic allocator manycore chip
Facing the Multicore-Challenge II
C2FPGA-A dependency-timing graph design methodology
Journal of Parallel and Distributed Computing
Hi-index | 0.00 |
It is widely accepted that use of an Application Specific Instruction Set Processor (ASIP) in an embedded system can provide a solution which is much more flexible than ASICs and much more efficient than standard processors in terms of performance and power consumption. However a lack of an acceptable design methodology and supporting tools for ASIPs limits their use even today. We present in this paper a methodology for design space exploration of high performance VLIW ASIPs by modeling Application Specific Functional Units in Trimaran Compiler Infrastructure. To demonstrate the effectiveness of our strategy we consider two important applications FFT and Kalman Filter and perform compute intensive operations in these applications via special Functional Units. The results we obtain are very promising with up to 2x speed improvement.