An introduction to database systems (7th ed.)
An introduction to database systems (7th ed.)
A relational model of data for large shared data banks
Communications of the ACM
Design of special-purpose VLSI chips: Example and opinions
ISCA '80 Proceedings of the 7th annual symposium on Computer Architecture
A parallel pipelined relational query processor
ACM Transactions on Database Systems (TODS)
Correctness Proofs of Communicating Processes: Three Illustrative Examples From the Literature
ACM Transactions on Programming Languages and Systems (TOPLAS)
Use of graph-theoretic models for optimal relational database accesses to perform join
ACM Transactions on Database Systems (TODS)
ACM Computing Surveys (CSUR)
Fragmentation: a technique for efficient query processing
ACM Transactions on Database Systems (TODS)
A VLSI Implementation of the Simplex Algorithm
IEEE Transactions on Computers
Complexity of Matrix Product on a Class of Orthogonally Connected Systolic Arrays
IEEE Transactions on Computers
Design of a Functionally Distributed, Multiprocessor Database Machine Using Data Flow Analysis
IEEE Transactions on Computers
Incomplete information and the join operation in database machines
ACM '87 Proceedings of the 1987 Fall Joint Computer Conference on Exploring technology: today and tomorrow
IEEE Transactions on Computers
On high-speed computing with a programmable linear array
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
Join processing in relational databases
ACM Computing Surveys (CSUR)
Modification operations in data base machines: where are they?
CSC '88 Proceedings of the 1988 ACM sixteenth annual conference on Computer science
Overview of the Jasmin database machine
SIGMOD '84 Proceedings of the 1984 ACM SIGMOD international conference on Management of data
VLSI Accelerators for Large Database Systems
IEEE Micro
Computational Complexity of Sorting and Joining Relations with Duplicates
IEEE Transactions on Knowledge and Data Engineering
An Object-Oriented Query Evaluation Scheme for Logical Databases in Massively Parallel Environment
IEEE Transactions on Knowledge and Data Engineering
A VLSI tree machine for relational data bases
ISCA '83 Proceedings of the 10th annual international symposium on Computer architecture
A parallel pipelined relational query processor: An architectural overview
ISCA '84 Proceedings of the 11th annual international symposium on Computer architecture
Dynamic and order preserving data partitioning for database machines
VLDB '85 Proceedings of the 11th international conference on Very Large Data Bases - Volume 11
Mapping Homogeneous Graphs on Linear Arrays
IEEE Transactions on Computers
A database machine based on the data distribution approach
AFIPS '84 Proceedings of the July 9-12, 1984, national computer conference and exposition
A reconfigurable VLSI architecture for a database processor
AFIPS '83 Proceedings of the May 16-19, 1983, national computer conference
AFIPS '83 Proceedings of the May 16-19, 1983, national computer conference
Performance analysis of database join processors
AFIPS '82 Proceedings of the June 7-10, 1982, national computer conference
A rapid turnaround design of a high speed VLSI search processor
Integration, the VLSI Journal
Paper: Hybrid systolic sorters
Parallel Computing
ACM Transactions on Reconfigurable Technology and Systems (TRETS)
How soccer players would do stream joins
Proceedings of the 2011 ACM SIGMOD International Conference on Management of data
Systolic optimization on GPU platforms
EUROCAST'11 Proceedings of the 13th international conference on Computer Aided Systems Theory - Volume Part I
Efficient frequent item counting in multi-core hardware
Proceedings of the 18th ACM SIGKDD international conference on Knowledge discovery and data mining
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This paper proposes the use of VLSI technology to perform relational database operations directly in hardware. It is shown that relational compulations, such as intersection, remove-duplicates, union, join, and division, can all be pipelined elegantly and efficiently on networks of processors having an array structure. These (systolic) processor arrays are readily and cost-effectively implementable with present technology, due to the extreme simplicity of their processors, and the high regularity of their interconnection structures.