A theory of diagnosis from first principles
Artificial Intelligence
Artificial Intelligence
A correction to the algorithm in Reiter's theory of diagnosis
Artificial Intelligence
Structure and chance: melding logic and probability for software debugging
Communications of the ACM
Aspect: detecting bugs with abstract dependences
ACM Transactions on Software Engineering and Methodology (TOSEM)
Model-based diagnosis of hardware designs
Artificial Intelligence
Diagnosing tree-structured systems
Artificial Intelligence
Algorithmic Program DeBugging
VHDL: Analysis and Modeling of Digital Systems
VHDL: Analysis and Modeling of Digital Systems
The Design and Analysis of Computer Algorithms
The Design and Analysis of Computer Algorithms
IJCAI '99 Proceedings of the Sixteenth International Joint Conference on Artificial Intelligence
Logic programs for consistency-based diagnosis
Logic programs for consistency-based diagnosis
No faults in structure?: how to diagnose hidden interactions
IJCAI'95 Proceedings of the 14th international joint conference on Artificial intelligence - Volume 2
Diagnosing tree-decomposable circuits
IJCAI'95 Proceedings of the 14th international joint conference on Artificial intelligence - Volume 2
Debugging VHDL Designs: Introducing Multiple Models and First Empirical Results
Applied Intelligence
Debugging VHDL designs using temporal process instances
IEA/AIE'2003 Proceedings of the 16th international conference on Developments in applied artificial intelligence
Model-Based Debugging -- State of the Art And Future Challenges
Electronic Notes in Theoretical Computer Science (ENTCS)
Automated Fault Localization for C Programs
Electronic Notes in Theoretical Computer Science (ENTCS)
Using abstract dependences to localize faults from procedural programs
AIAP'07 Proceedings of the 25th conference on Proceedings of the 25th IASTED International Multi-Conference: artificial intelligence and applications
Automatic fault localization for property checking
HVC'06 Proceedings of the 2nd international Haifa verification conference on Hardware and software, verification and testing
Employing test suites for verilog fault localization
CAEPIA'09 Proceedings of the Current topics in artificial intelligence, and 13th conference on Spanish association for artificial intelligence
Towards lightweight fault localization in procedural programs
IEA/AIE'06 Proceedings of the 19th international conference on Advances in Applied Artificial Intelligence: industrial, Engineering and Other Applications of Applied Intelligent Systems
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In this paper we describe the use of model-based diagnosis for locating bugs in hardware designs. Nowadays hardware designs are written in a programming language. We restrict our view to hardware designs written in a subset of the commonly used hardware description language VHDL. This subset includes all synthesize-able (register transfer level (RTL)) programs, i.e., programs that can be automatically converted into a gate level representation. Therefore almost all VHDL programs are RTL programs. We show the conversion of VHDL programs into a logical representation. This representation is a model that can be directly used by a model-based diagnosis engine for computing diagnoses. The resulting diagnoses are mapped back to the VHDL code fragments of the original program explaining a misbehavior. In addition, we specify some rules optimizing the obtained results. We further present some arguments showing that the proposed debugging technique scales up to large designs.