RISA: accurate and efficient placement routability modeling
ICCAD '94 Proceedings of the 1994 IEEE/ACM international conference on Computer-aided design
Congestion driven quadratic placement
DAC '98 Proceedings of the 35th annual Design Automation Conference
Requirements for models of achievable routing
ISPD '00 Proceedings of the 2000 international symposium on Physical design
Can recursive bisection alone produce routable placements?
Proceedings of the 37th Annual Design Automation Conference
Estimating routing congestion using probabilistic analysis
Proceedings of the 2001 international symposium on Physical design
Dragon2000: standard-cell placement tool for large industry circuits
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Congestion minimization during placement
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Efficient and effective placement for very large circuits
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Proceedings of the 39th annual Design Automation Conference
Congestion minimization during placement without estimation
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
A Trade-off Oriented Placement Tool
Proceedings of the 2003 IEEE/ACM international conference on Computer-aided design
Accurate and efficient flow based congestion estimation in floorplanning
Proceedings of the 2004 Asia and South Pacific Design Automation Conference
A congestion-driven placement framework with local congestion prediction
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Routability-driven placement and white space allocation
Proceedings of the 2004 IEEE/ACM International conference on Computer-aided design
Congestion driven incremental placement algorithm for standard cell layout
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Prediction and reduction of routing congestion
Proceedings of the 2006 international symposium on Physical design
Evaluation, prediction and reduction of routing congestion
Microelectronics Journal
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This paper presents a novel method to reduce routing congestion during placement stage. The proposed approach is used as a post-processing step in placement. Congestion reduction is based on local improvement on the existing layout. However, the approach has a global view of the congestion over the entire design. It uses integer linear programming (ILP) to formulate the conflicts between multiple congested regions, and performs local improvement according to the solution of ILP. Experiments show that the proposed approach can effectively reduce the total overflow of global routing result. The short running time of the algorithm indicates good scalability on large designs.