Routability driven white space allocation for fixed-die standard-cell placement
Proceedings of the 2002 international symposium on Physical design
Proceedings of the 39th annual Design Automation Conference
Dragon2000: standard-cell placement tool for large industry circuits
Proceedings of the 2000 IEEE/ACM international conference on Computer-aided design
Congestion reduction during placement based on integer programming
Proceedings of the 2001 IEEE/ACM international conference on Computer-aided design
Proceedings of the 2003 international workshop on System-level interconnect prediction
Accurate pseudo-constructive wirelength and congestion estimation
Proceedings of the 2003 international workshop on System-level interconnect prediction
Congestion minimization during placement without estimation
Proceedings of the 2002 IEEE/ACM international conference on Computer-aided design
Congestion reduction during placement with provably good approximation bound
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Congestion prediction in early stages
Proceedings of the 2005 international workshop on System level interconnect prediction
A congestion-driven placement framework with local congestion prediction
GLSVLSI '05 Proceedings of the 15th ACM Great Lakes symposium on VLSI
Interconnect-driven floorplanning by searching alternative packings
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Congestion driven incremental placement algorithm for standard cell layout
ASP-DAC '03 Proceedings of the 2003 Asia and South Pacific Design Automation Conference
Congestion prediction in floorplanning
Proceedings of the 2005 Asia and South Pacific Design Automation Conference
Prediction and reduction of routing congestion
Proceedings of the 2006 international symposium on Physical design
Area reduction by deadspace utilization on interconnect optimized floorplan
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Fast and accurate routing demand estimation for efficient routability-driven placement
Proceedings of the conference on Design, automation and test in Europe
Congestion prediction in early stages of physical design
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Guiding global placement with wire density
Proceedings of the 2008 IEEE/ACM International Conference on Computer-Aided Design
Register pressure aware scheduling for high level synthesis
Proceedings of the 16th Asia and South Pacific Design Automation Conference
A SimPLR method for routability-driven placement
Proceedings of the International Conference on Computer-Aided Design
Stability and scalability in global routing
Proceedings of the System Level Interconnect Prediction Workshop
Progress and challenges in VLSI placement research
Proceedings of the International Conference on Computer-Aided Design
| Hi-index | 0.03 |
Typical placement objectives involve reducing net-cut cost or minimizing wirelength. Congestion minimization is the least understood, however, it models routability most accurately. In this paper, we study the congestion minimization problem during placement. First, we show that a global placement with minimum wirelength has minimum total congestion. We show that minimizing wirelength may (and in general, will) create locally congested regions. We test seven different congestion minimization objectives. We also propose a post processing stage to minimize congestion. Our main contribution and results can be summarized as follows. (1) Among a variety of cost functions and methods for congestion minimization (including several currently used in industry), wirelength alone followed by a post processing congestion minimization works the best and is one of the fastest. (2) Cost functions such as a hybrid length plus congestion (commonly believed to be very effective) do not always work very well. (3) Net-centric post-processing techniques are among the best congestion alleviation approaches. (4) Congestion at the global placement level, correlates well with congestion of detailed placement