A proof of the nonrestoring division algorithm and its implementation on an ALU
Formal Methods in System Design - Special issue on designing correct circuits
Formal Verification for Fault-Tolerant Architectures: Prolegomena to the Design of PVS
IEEE Transactions on Software Engineering
Verification of arithmetic circuits with binary moment diagrams
DAC '95 Proceedings of the 32nd annual ACM/IEEE Design Automation Conference
Word level model checking—avoiding the Pentium FDIV error
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Bit-level analysis of an SRT divider circuit
DAC '96 Proceedings of the 33rd annual Design Automation Conference
Design Issues in Division and Other Floating-Point Operations
IEEE Transactions on Computers
A Mechanically Checked Proof of the AMD5K86TM Floating-Point Division Program
IEEE Transactions on Computers
On the SUP-INF Method for Proving Presburger Formulas
Journal of the ACM (JACM)
A Mechanically Checked Proof of Correctness of the AMD K5 Floating Point Square Root Microcode
Formal Methods in System Design
Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
Proceedings of the 8th International Conference on Computer Aided Verification
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Verification of a subtractive radix-2 square root algorithm and implementation
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
Effective Theorem Proving for Hardware Verification
TPCD '94 Proceedings of the Second International Conference on Theorem Provers in Circuit Design - Theory, Practice and Experience
Verification of IEEE Compliant Subtractive Division Algorithms
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
Hierarchical Verification of Two-Dimensional High-Speed Multiplication in PVS: A Case Study
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
Verification of All Circuits in a Floating-Point Unit Using Word-Level Model Checking
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
Integration in PVS: Tables, Types, and Model Checking
TACAS '97 Proceedings of the Third International Workshop on Tools and Algorithms for Construction and Analysis of Systems
TAPSOFT '95 Proceedings of the 6th International Joint Conference CAAP/FASE on Theory and Practice of Software Development
Automatic Datapath Extraction for Efficient Usage of HDD
CAV '97 Proceedings of the 9th International Conference on Computer Aided Verification
Modular Verification of SRT Division
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Verifying the SRT Division Algorithm Using Theorem Proving Techniques
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Mechanically Verifying a Family of Multiplier Circuits
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Hybrid Decision Diagrams: Overcoming the Limitations of MTBDDs and BMDs
Hybrid Decision Diagrams: Overcoming the Limitations of MTBDDs and BMDs
Verifying the SRT Division Algorithm Using Theorem Proving Techniques
Formal Methods in System Design
Programming with Proofs: Language-Based Approaches to Totally Correct Software
Verified Software: Theories, Tools, Experiments
On software certification: we need product-focused approaches
Monterey'08 Proceedings of the 15th Monterey conference on Foundations of Computer Software: future Trends and Techniques for Development
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We describe a formal specification and mechanizedverification in PVS of the general theory of SRT division alongwith a specific hardware realization of the algorithm. Thespecification demonstrates how attributes of the PVS language(in particular, predicate subtypes) allow the general theory to bedeveloped in a readable manner that is similar to textbookpresentations, while the PVS {\tt table} construct allowsdirect specification of the implementation‘s quotient lookup table.Verification of the derivations in the SRT theory and for the datapath and lookup table of the implementation are highly automated andperformed for arbitrary, but finite precision; in addition, thetheory is verified for general radix, while the implementation isspecialized to radix 4. The effectiveness of the automation stemsfrom the tight integration in PVS of rewriting with decisionprocedures for equality, linear arithmetic over integers andrationals, and propositional logic. This example demonstrates thatthe resources of an expressive specification language and of ageneral-purpose theorem prover are not inimical to highly automatedverification in this domain, and can contribute to clarity,generality, and reuse.