A computational logic handbook
A computational logic handbook
Common LISP: the language (2nd ed.)
Common LISP: the language (2nd ed.)
Verification of a subtractive radix-2 square root algorithm and implementation
ICCD '95 Proceedings of the 1995 International Conference on Computer Design: VLSI in Computers and Processors
Verification of IEEE Compliant Subtractive Division Algorithms
FMCAD '96 Proceedings of the First International Conference on Formal Methods in Computer-Aided Design
Modular Verification of SRT Division
CAV '96 Proceedings of the 8th International Conference on Computer Aided Verification
Floating Point Verification in HOL
Proceedings of the 8th International Workshop on Higher Order Logic Theorem Proving and Its Applications
Word Level Symbolic Model Checking: A New Approach for Verifying Arithmetic Circuits
Word Level Symbolic Model Checking: A New Approach for Verifying Arithmetic Circuits
Verification of Arithmetic Functions with Binary Moment Diagrams
Verification of Arithmetic Functions with Binary Moment Diagrams
A Mechanically Checked Proof of a Multiprocessor Result via a Uniprocessor View
Formal Methods in System Design
Structured Theory Development for a Mechanized Logic
Journal of Automated Reasoning
Journal of Automated Reasoning
Modular Verification of SRT Division
Formal Methods in System Design
Journal of Automated Reasoning
Solving the generalized mask constraint for test generation of binary floating point add operation
Theoretical Computer Science - Real numbers and computers
FMCAD '00 Proceedings of the Third International Conference on Formal Methods in Computer-Aided Design
Mechanical Verification of a Square Root Algorithm Using Taylor's Theorem
FMCAD '02 Proceedings of the 4th International Conference on Formal Methods in Computer-Aided Design
A Generic Library for Floating-Point Numbers and Its Application to Exact Computing
TPHOLs '01 Proceedings of the 14th International Conference on Theorem Proving in Higher Order Logics
Formal Verification of the VAMP Floating Point Unit
CHARME '01 Proceedings of the 11th IFIP WG 10.5 Advanced Research Working Conference on Correct Hardware Design and Verification Methods
Journal of Automated Reasoning
Formal Verification of the VAMP Floating Point Unit
Formal Methods in System Design
Verification of executable pipelined machines with bit-level interfaces
ICCAD '05 Proceedings of the 2005 IEEE/ACM International conference on Computer-aided design
Provably faithful evaluation of polynomials
Proceedings of the 2006 ACM symposium on Applied computing
Affine functions and series with co-inductive real numbers
Mathematical Structures in Computer Science
Automated deduction for verification
ACM Computing Surveys (CSUR)
Colouring Proofs: A Lightweight Approach to Adding Formal Structure to Proofs
Electronic Notes in Theoretical Computer Science (ENTCS)
Trustworthy numerical computation in Scala
Proceedings of the 2011 ACM international conference on Object oriented programming systems languages and applications
IJCAR'06 Proceedings of the Third international joint conference on Automated Reasoning
Refinement and theorem proving
SFM'06 Proceedings of the 6th international conference on Formal Methods for the Design of Computer, Communication, and Software Systems
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We present a rigorous mathematical proof of the correctness of thefloating point square root instruction of the AMD K5 microprocessor.The instruction is represented as a program in a formal language thatwas designed for this purpose, based on the K5 microcode and thearchitecture of its FPU. We prove a statement of its correctness thatcorresponds directly with the IEEE Standard. We also derive anequivalent formulation, expressed in terms of rational arithmetic,which has been encoded as a formula in the ACL2 logic and mechanicallyverified with the ACL2 prover. Finally, we describe a microcodemodification that was implemented as a result of this analysis inorder to ensure the correctness of the instruction.