General-Purpose Systolic Arrays

Authors:
Kurtis T. Johnson;A. R. Hurson;Behrooz Shirazi
Affiliations:
-;-;-
Venue:
Computer
Year:
1993

Citing 9
Cited 9

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A FPGA-Based Systolic Array Prototype Implementing the Quadrant Interlocking Factorization Method

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Abstract

The extension of systolic array architecture from fixed- or special-purpose architectures to general-purpose, SIMD (single-instruction stream, multiple-data stream), MIMD (multiple-instruction stream, multiple-data stream) architectures, and hybrid architectures that combine both commercial and FPGA (field-programmable gate array) technologies is chronicled. The authors present a taxonomy for systolic organizations, discuss each architecture's methods of exploiting concurrencies, and compare performance attributes of each. The authors also describe a number of implementation issues that determine a systolic array's performance efficiency, such as algorithms and mapping, system integration through memory subsystems, cell granularity, and extensibility to a wide variety of topologies.