VHDL synthesis using structured modeling
DAC '89 Proceedings of the 26th ACM/IEEE Design Automation Conference
HAL: a multi-paradigm approach to automatic data path synthesis
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
DAC '86 Proceedings of the 23rd ACM/IEEE Design Automation Conference
VHDL as Input for High-Level Synthesis
IEEE Design & Test
Principles of Compiler Design (Addison-Wesley series in computer science and information processing)
Principles of Compiler Design (Addison-Wesley series in computer science and information processing)
Synthesis of VHDL concurrent processes
EURO-DAC '94 Proceedings of the conference on European design automation
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Silicon 1076, a very-high-speed integrated circuit hardware description language (VHDL) design environment developed for specifying, simulating, and synthesizing digital hardware, is described. The environment integrates software tools for architectural-level design space exploration and synthesis and RTL synthesis. Silicon 1076 supports a top-down design methodology, while making use of bottom-up design information such as area and delay of modules and interconnect and routing estimates. The flexible design environment allows the user to describe separate parts of the design at different abstraction levels and to perform mixed-level VHDL simulation and synthesis. With the synthesis tools, the user can perform high-level what-if analysis and planning by constraining and exploring portions of the design space.