Reliability-Availability-Serviceability Characteristics of a Compressed-Memory System
DSN '00 Proceedings of the 2000 International Conference on Dependable Systems and Networks (formerly FTCS-30 and DCCA-8)
Parallel compression with cooperative dictionary construction
DCC '96 Proceedings of the Conference on Data Compression
IBM memory expansion technology (MXT)
IBM Journal of Research and Development
Memory expansion technology (MXT): competitive impact
IBM Journal of Research and Development
Hardware Compressed Main Memory: Operating System Support and Performance Evaluation
IEEE Transactions on Computers
Design and Optimization of Large Size and Low Overhead Off-Chip Caches
IEEE Transactions on Computers
A Robust Main-Memory Compression Scheme
Proceedings of the 32nd annual international symposium on Computer Architecture
Memory State Compressors for Giga-Scale Checkpoint/Restore
Proceedings of the 14th International Conference on Parallel Architectures and Compilation Techniques
Improving disk bandwidth-bound applications through main memory compression
MEDEA '07 Proceedings of the 2007 workshop on MEmory performance: DEaling with Applications, systems and architecture
IBM memory expansion technology (MXT)
IBM Journal of Research and Development
Dynamic dictionary-based data compression for level-1 caches
ARCS'06 Proceedings of the 19th international conference on Architecture of Computing Systems
Linearly compressed pages: a low-complexity, low-latency main memory compression framework
Proceedings of the 46th Annual IEEE/ACM International Symposium on Microarchitecture
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Pinnacle leverages state-of-the-art technologies to establish a low-cost, high-performance single-chip memory controller. The chip uses IBM's Memory Expansion Technology system architecture, which more than doubles the installed main memory's effective size without adding significant cost or degrading performance.