Logic design principles with emphasis on testable semicustom circuits
Logic design principles with emphasis on testable semicustom circuits
Fundamentals of MOS digital integrated circuits
Fundamentals of MOS digital integrated circuits
Variants of an Improved Carry Look-Ahead Adder
IEEE Transactions on Computers
Introduction to Arithmetic for Digital Systems Designers
Introduction to Arithmetic for Digital Systems Designers
A fast hybrid carry-lookahead/carry-select adder design
GLSVLSI '01 Proceedings of the 11th Great Lakes symposium on VLSI
Fast Hardware-Based Algorithms for Elementary Function Computations Using Rectangular Multipliers
IEEE Transactions on Computers
Fast Evaluation of the Elementary Functions in Single Precision
IEEE Transactions on Computers
Dynamic CMOS circuit techniques for delay and power reduction in parallel adders
ARVLSI '95 Proceedings of the 16th Conference on Advanced Research in VLSI (ARVLSI'95)
High-Speed Parallel-Prefix VLSI Ling Adders
IEEE Transactions on Computers
Constructive threshold logic addition: a synopsis of the last decade
ICANN/ICONIP'03 Proceedings of the 2003 joint international conference on Artificial neural networks and neural information processing
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A fully static complementary metal-oxide semiconductor (CMOS) implementation of a Ling-type 32-bit adder is described. The implementation saves up to one gate delay and always reduces the number of serial transistors in the worst-case critical path over the conventional carry look-ahead (CLA) approach with a negligible increaser in hardware.