Lower Overhead Design for Testability of Programmable Logic Arrays
IEEE Transactions on Computers - The MIT Press scientific computation series
A New Approach to the Design of Testable PLA's
IEEE Transactions on Computers
On the testable design and built-in self-test of plas
On the testable design and built-in self-test of plas
On the Design of Pseudoexhaustive Testable PLAs
IEEE Transactions on Computers - Fault-Tolerant Computing
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
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The pseudoexhaustive testing (PET) scheme is an economical approach to testing a large embedded programmable logic array (PLA). The authors propose an efficient algorithm named low overhead PET (LOPET) to partition the product lines. By applying this algorithm, both the area overhead and test length are reduced significantly.