On-the-fly conversion of redundant into conventional representations
IEEE Transactions on Computers
Fast Multiplication Without Carry-Propagate Addition
IEEE Transactions on Computers
IEEE Transactions on Computers
Higher Radix Square Root with Prescaling
IEEE Transactions on Computers - Special issue on computer arithmetic
Division and Square Root: Digit-Recurrence Algorithms and Implementations
Division and Square Root: Digit-Recurrence Algorithms and Implementations
Division Algorithms and Implementations
IEEE Transactions on Computers
Very High Radix Square Root with Prescaling and Rounding and a Combined Division/Square Root Unit
IEEE Transactions on Computers
A Digit-by-Digit Algorithm for mth Root Extraction
IEEE Transactions on Computers
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The speed of high-radix digit-recurrence dividers and square-root units is mainly determined by the complexity of the result-digit selection. We present a scheme in which a simpler function speculates the result digit, and, when this speculation is incorrect, a rollback or a partial advance is performed. This results in operations with a shorter cycle time and a variable number of cycles. The scheme can be used in separate division and square-root units, or in a combined one. Several designs were realized and compared in terms of execution time and area. The fastest unit considered is a radix-512 divider with a partial advance of six bits.