Synchronizing Large VLSI Processor Arrays
IEEE Transactions on Computers
Deadlock-Free Message Routing in Multiprocessor Interconnection Networks
IEEE Transactions on Computers
Analysis of a 3D toroidal network for a shared memory architecture
Proceedings of the 1988 ACM/IEEE conference on Supercomputing
The Stanford Dash Multiprocessor
Computer
A versatile model for predicting the performance of deflection-routing networks
Performance Evaluation - Special issue on performance modeling of high speed telecommunication systems
IEEE Spectrum - Supercomputing
The CM-5 Connection Machine: a scalable supercomputer
Communications of the ACM
Design and implementation of a prototype optical deflection network
SIGCOMM '94 Proceedings of the conference on Communications architectures, protocols and applications
Genetic Algorithms in Search, Optimization and Machine Learning
Genetic Algorithms in Search, Optimization and Machine Learning
Propagation delay uncertainty in time-of-flight systems
Propagation delay uncertainty in time-of-flight systems
Distribution-based bandwidth access scheme in slotted all-optical packet-switched networks
Computer Networks: The International Journal of Computer and Telecommunications Networking
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Deflection routing resolves output port contention in packet-switched multiprocessor interconnection networks by granting the preferred port to the highest priority packet and directing contending packets out other ports. When combined with optical links and switches, deflection routing yields simple bufferless nodes, high-bit rates, scalable throughput, and low latency. We discuss the problem of packet synchronization in synchronous optical deflection networks with nodes distributed across boards, racks, and cabinets. Synchronous operation is feasible due to very predictable optical propagation delays. A routing control processor at each node examines arriving packets and assigns them to output ports. Packets arriving on different input ports must be bit-wise aligned; there are no elastic buffers to correct for mismatched arrivals. "Time-of-flight" packet synchronization is done by balancing link delays during network design. Using a directed graph network model, we formulate a constrained minimization problem for minimizing link delays subject to synchronization and packaging constraints. We demonstrate our method on a ShuffleNet graph, and show modifications to handle multiple packet sizes and latency-critical paths.