A data locality optimizing algorithm
PLDI '91 Proceedings of the ACM SIGPLAN 1991 conference on Programming language design and implementation
Bus-invert coding for low-power I/O
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Pipeline gating: speculation control for energy reduction
Proceedings of the 25th annual international symposium on Computer architecture
A coding framework for low-power address and data busses
IEEE Transactions on Very Large Scale Integration (VLSI) Systems
Way-predicting set-associative cache for high performance and low energy consumption
ISLPED '99 Proceedings of the 1999 international symposium on Low power electronics and design
Selective cache ways: on-demand cache resource allocation
Proceedings of the 32nd annual ACM/IEEE international symposium on Microarchitecture
Instruction flow-based front-end throttling for power-aware high-performance processors
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Irredundant address bus encoding for low power
ISLPED '01 Proceedings of the 2001 international symposium on Low power electronics and design
Applied Numerical Methods with Software
Applied Numerical Methods with Software
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An encoding technique exploits application information to reduce power consumption along the instruction memory communication path in embedded processors. Microarchitectural support enables reprogrammability of the encoding transformations to track specific code effectively, and the restriction to functional transformations delivers major power savings. Having reprogrammable hardware also allows flexible, inexpensive switches between transformations.