On the synthesis of a reactive module
POPL '89 Proceedings of the 16th ACM SIGPLAN-SIGACT symposium on Principles of programming languages
Handbook of theoretical computer science (vol. B)
Theoretical Computer Science
Languages, automata, and logic
Handbook of formal languages, vol. 3
Infinite games on finitely coloured graphs with applications to automata on infinite trees
Theoretical Computer Science
Open Systems in Reactive Environments: Control and Synthesis
CONCUR '00 Proceedings of the 11th International Conference on Concurrency Theory
Implementation of a Strategy Improvement Algorithm for Finite-State Parity Games
CIAA '00 Revised Papers from the 5th International Conference on Implementation and Application of Automata
LICS '96 Proceedings of the 11th Annual IEEE Symposium on Logic in Computer Science
A Supervisory Control Method for Ensuring the Conformance of Real-Time Discrete Event Systems
Discrete Event Dynamic Systems
Modal logics for timed control
CONCUR 2005 - Concurrency Theory
Folk theorems on the determinization and minimization of timed automata
Information Processing Letters
Non-Interference Control Synthesis for Security Timed Automata
Electronic Notes in Theoretical Computer Science (ENTCS)
Trading Infinite Memory for Uniform Randomness in Timed Games
HSCC '08 Proceedings of the 11th international workshop on Hybrid Systems: Computation and Control
Masking Faults While Providing Bounded-Time Phased Recovery
FM '08 Proceedings of the 15th international symposium on Formal Methods
Timed Parity Games: Complexity and Robustness
FORMATS '08 Proceedings of the 6th international conference on Formal Modeling and Analysis of Timed Systems
Complexity results in revising UNITY programs
ACM Transactions on Autonomous and Adaptive Systems (TAAS)
Synthesis of Non-Interferent Timed Systems
FORMATS '09 Proceedings of the 7th International Conference on Formal Modeling and Analysis of Timed Systems
On the Complexity of Synthesizing Relaxed and Graceful Bounded-Time 2-Phase Recovery
FM '09 Proceedings of the 2nd World Congress on Formal Methods
Automated incremental synthesis of timed automata
FMICS'06/PDMC'06 Proceedings of the 11th international workshop, FMICS 2006 and 5th international workshop, PDMC conference on Formal methods: Applications and technology
Incremental synthesis of fault-tolerant real-time programs
SSS'06 Proceedings of the 8th international conference on Stabilization, safety, and security of distributed systems
Synthesis of memory-efficient "real-time" controllers for safety objectives
Proceedings of the 14th international conference on Hybrid systems: computation and control
Timed alternating-time temporal logic
FORMATS'06 Proceedings of the 4th international conference on Formal Modeling and Analysis of Timed Systems
FSTTCS '05 Proceedings of the 25th international conference on Foundations of Software Technology and Theoretical Computer Science
Fault diagnosis using timed automata
FOSSACS'05 Proceedings of the 8th international conference on Foundations of Software Science and Computation Structures
Controller synthesis for MTL specifications
CONCUR'06 Proceedings of the 17th international conference on Concurrency Theory
Application of automated revision for UML models: a case study
ICDCN'12 Proceedings of the 13th international conference on Distributed Computing and Networking
Template-Based controller synthesis for timed systems
TACAS'12 Proceedings of the 18th international conference on Tools and Algorithms for the Construction and Analysis of Systems
Minimum-time reachability in timed games
ICALP'07 Proceedings of the 34th international conference on Automata, Languages and Programming
The complexity of bounded synthesis for timed control with partial observability
FORMATS'12 Proceedings of the 10th international conference on Formal Modeling and Analysis of Timed Systems
Synthesis of memory-efficient, clock-memory free, and non-Zeno safety controllers for timed systems
Information and Computation
MR4UM: A framework for adding fault tolerance to UML state diagrams
Theoretical Computer Science
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We study the problem of control synthesis for a timed plant and an external timed specification, modelled as timed automata. Our main result is that the problem is decidable when we are given a priori the resources for the controller (the number of clocks, observational power of clocks, etc.) and when the specification is an 驴-regular timed language describing undesired behaviours. We also show that for deterministic specifications, if there is a controller at all, then there is one which uses the combined resources of the plant and specification. The decidability of other related problems is also investigated.