Fast Multi-Layer Critical Area Computation

Authors:
Hua Xue;Chennian Di;Jochen A. G. Jess
Affiliations:
-;-;-
Venue:
Proceedings of the IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems
Year:
1993

Layout compaction for yield optimization via critical area minimization

DATE '00 Proceedings of the conference on Design, automation and test in Europe
Yield modeling and BEOL fundamentals

Proceedings of the 2001 international workshop on System-level interconnect prediction
A yield-driven gridless router

Journal of Computer Science and Technology
A stochastic-based efficient critical area extractor on OpenAccess platform

Proceedings of the 19th ACM Great Lakes symposium on VLSI

Hi-index	0.00