Concurrent Error Detection in Asynchronous Burst-Mode Controllers
Proceedings of the conference on Design, Automation and Test in Europe - Volume 2
Designing Resistant Circuits against Malicious Faults Injection Using Asynchronous Logic
IEEE Transactions on Computers
Concurrent Error Detection Methods for Asynchronous Burst-Mode Machines
IEEE Transactions on Computers
A New Approach to Single Event Effect Tolerance Based on Asynchronous Circuit Technique
Journal of Electronic Testing: Theory and Applications
An infrastructure for accurate characterization of single-event transients in digital circuits
Microprocessors & Microsystems
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Concurrent error detection (CED) methods are typically employed to provide an indication of the operational health of synchronous circuits during normal functionality. Existing CED techniques, however, require modification in order to be successfully adapted to asynchronous designs. We discuss the limitations of duplication, the simplest CED method, when applied to asynchronous circuits. We demonstrate that such limitations arise mainly due to comparison synchronization issues and inadequate detection of performance-related errors. We propose a circuit that alleviates the difficulties associated with comparison synchronization and we introduce a methodology that enables detection of errors that do not result in logicdiscrepancies and, thus, may not be detected through comparison. The proposed techniques are illustrated on example circuits, revealing their ability to render concurrently testable asynchronous designs.