Communications of the ACM
MONTAGNE: An FPL for Synchronous and Asynchronous Circuits
Selected papers from the Second International Workshop on Field-Programmable Logic and Applications, Field-Programmable Gate Arrays: Architectures and Tools for Rapid Prototyping
JRoute: A Run-Time Routing API for FPGA Hardware
IPDPS '00 Proceedings of the 15 IPDPS 2000 Workshops on Parallel and Distributed Processing
FPL '95 Proceedings of the 5th International Workshop on Field-Programmable Logic and Applications
An Asynchronous Low-Power 80C51 Microcontroller
ASYNC '98 Proceedings of the 4th International Symposium on Advanced Research in Asynchronous Circuits and Systems
The Design of an Asynchronous MIPS R3000 Microprocessor
ARVLSI '97 Proceedings of the 17th Conference on Advanced Research in VLSI (ARVLSI '97)
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Asynchronous logic design has been around for decades. However, only recently has it gained any commercial success. Research has focused on a wide variety of uses, from microprocessor design to low power circuits. The fact that design tools and designer experience are geared more towards synchronous circuit design has limited the acceptance and popularity of asynchronous design. The JBits™ API provides low level access to the configuration of resources in a Xilinx® FPGA. Because of the control given to the user, the JBits API is an ideal design environment for implementing asynchronous circuits on mainstream FPGAs. An asynchronous full adder was implemented on a Virtex®FPGA. The design of the circuit is described as well as modifications to the design tools to simplify asynchronous circuit specification.