ATPG for Heat Dissipation Minimization During Test Application

ATPG for heat dissipation minimization during scan testing

DAC '97 Proceedings of the 34th annual Design Automation Conference

ATPG for Heat Dissipation Minimization During Test Application

IEEE Transactions on Computers

Differential Sensing Strategy for Dynamic Thermal Testing of ICs

VTS '97 Proceedings of the 15th IEEE VLSI Test Symposium

20.3 A Test Pattern Generation Methodology for Low-Power Consumption

VTS '98 Proceedings of the 16th IEEE VLSI Test Symposium

A Token Scan Architecture for Low Power Testing

ITC '01 Proceedings of the 2001 IEEE International Test Conference

Evaluation of heuristic techniques for test vector ordering

Proceedings of the 14th ACM Great Lakes symposium on VLSI

Generation of Primary Input Blocking Pattern for Power Minimization during Scan Testing

Journal of Electronic Testing: Theory and Applications

A critical-path-aware partial gating approach for test power reduction

ACM Transactions on Design Automation of Electronic Systems (TODAES)

Customizing pattern set for test power reduction via improved X-identification and reordering

Proceedings of the 16th ACM/IEEE international symposium on Low power electronics and design