IS-FPGA: a new symmetric FPGA architecture with implicit scan

  • Authors:
  • Michel Renovell;Penelope Faure;J. Portal;Joan Figueras;Yervant Zorian

  • Affiliations:
  • -;-;-;-;-

  • Venue:
  • Proceedings of the IEEE International Test Conference 2001
  • Year:
  • 2001

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Abstract