Aliasing and Diagnosis Probability in MISR and STUMPS Using a General Error Model

Accumulator-Based Compaction of Test Responses

IEEE Transactions on Computers

Utilization of On-Line (Concurrent) Checkers during Built-In Self-Test and Vice Versa

IEEE Transactions on Computers

Parallel Signature Analysis Design with Bounds on Aliasing

IEEE Transactions on Computers

A New Framework for Designing: Built-in Test Multichip Modules with Pipelined Test Strategy

IEEE Design & Test

Design of Self-Diagnostic Boards by Multiple Signature Analysis

IEEE Transactions on Computers

Fault-Tolerant Design Strategies for High Reliability and Safety

IEEE Transactions on Computers

DPDAT: DATA PATH DIRECT ACCESS TESTING

ITC '01 Proceedings of the 2001 IEEE International Test Conference