Using Decision Trees to Derive the Complement of a Binary Function with Multiple-Valued Inputs
IEEE Transactions on Computers
Statistical Complexity of Algorithms for Boolean Function Minimization
Journal of the ACM (JACM)
Logic Design and Switching Theory
Logic Design and Switching Theory
Logic Minimization Algorithms for VLSI Synthesis
Logic Minimization Algorithms for VLSI Synthesis
Minimization Algorithms for Multiple-Valued Programmable Logic Arrays
IEEE Transactions on Computers
An Optimization Technique for the Design of Multiple Valued PLA's
IEEE Transactions on Computers
On Input Permutation Technique for Multiple-Valued Logic Synthesis
ISMVL '95 Proceedings of the 25th International Symposium on Multiple-Valued Logic
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Upper and lower bounds are shown for the average number of product terms required in the minimal realization, as a function of the number of nonzero output values. The variance, in addition to the bounds, allows conclusions to be drawn about how PLA size determines the set of realizable functions. Although the bounds are most accurate when there are few nonzero values, they are adequate for analyzing commercially available PLAs. The analysis shows that, for all but one commercially available PLA, the number of nonzero values is a statistically meaningful criterion for determining whether or not a given function is likely to be realized.