An approach to guided incremental specification
EURO-DAC '95/EURO-VHDL '95 Proceedings of the conference on European design automation
Hardware synthesis from requirement specifications
EURO-DAC '96/EURO-VHDL '96 Proceedings of the conference on European design automation
Symbolic timing verification of timing diagrams using Presburger formulas
DAC '97 Proceedings of the 34th annual Design Automation Conference
Semantics and verification of action diagrams with linear timing
ACM Transactions on Design Automation of Electronic Systems (TODAES)
Timing Diagrams: Formalization and Algorithmic Verification
Journal of Logic, Language and Information
Interface Timing Verification with Delay Correlation Using Constraint Logic Programming
EDTC '97 Proceedings of the 1997 European conference on Design and Test
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