Interconnected rings and oscillators as gigahertz clock distribution nets

  • Authors:
  • Manuel Salim Maza;Mónico Linares Aranda

  • Affiliations:
  • Instituto Nacional de Astrofisica, Optica y Electrónica, INAOE, Puebla, Pue. México;Instituto Nacional de Astrofisica, Optica y Electrónica, INAOE, Puebla, Pue. México

  • Venue:
  • Proceedings of the 13th ACM Great Lakes symposium on VLSI
  • Year:
  • 2003

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Abstract

The performance of interconnected rings and oscillators, working as clock distribution networks, is analyzed and compared among several configurations. The use of interconnected 3-inverter rings as globally asynchronous, locally synchronous clock distribution networks is proposed even for chip lengths from 4 to 24 mm. In this approach, modularity and basic cell properties are kept while the power consumption results directly proportional to the number of blocks. Typical 3.3V AMS 0.35mm CMOS N-well process parameters were used for the analysis. Regarding the current area expansion, we show that interconnected rings is a more robust approach than the interconnected oscillators.